The Zynq™ UltraScale+™ RFSoC family integrates key subsystems for multiband, multi-mode cellular radios and cable infrastructure (DOCSIS) into an SoC platform that contains a feature-rich 64-bit quad-core Arm® Cortex®-A53 and dual-core Arm Cortex-R5F based processing system.
Combining the processing system with UltraScale™ architecture programmable logic and RF-ADCs,
RF-DACs, and soft-decision FECs, the Zynq UltraScale+ RFSoC family is capable of implementing a complete software-defined radio including direct RF sampling data converters, enabling CPRI™ and gigabit Ethernet-to-RF on a single, highly programmable SoC.
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Integration of RF Analog
The monolithic integration of direct RF-sampling data converters onto an adaptive SoC eliminates the need for external data converters, enabling a flexible solution with up to 50% reduced power and footprint over a multi-component solution–including the elimination of the power-hungry FPGA-to-Analog interfaces like JESD204. This approach also enables a highly flexible solution, moving much of the RF signal processing into the digital domain
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Soft Decision Forward Error Cancelling (SD-FEC)
Zynq™ UltraScale+™ RFSoC integrates a soft-decision forward error-correction cores (SD-FEC) IP block with low-density parity checking (LDPC) and turbo codec support. The hardened cores delivers over 1Gb/s of performance at low latency, as well as lower power and smaller area than soft logic implementations.
- Hardened Digital Front-End
Zynq RFSoC DFE is the latest adaptive RFSoC platform that integrates more hardened IP than soft logic for critical DFE processing. Enabling a flexible solution for 5G New Radio, Zynq RFSoC DFE operates up to 7.125GHz of input/output frequency with power-efficiency and cost-effectiveness.
- Hardware Adaptability
The Zynq UltraScale+ RFSoC architecture integrates FPGA fabric for flexibility to meet a wide range of requirements with the same foundational hardware. The ability to leverage the same platform to address diverse requirements and emerging standards allows vendors to react quickly to new market opportunities.
- Complete SoC for Single-Chip Radio
As a heterogeneous compute architecture that includes a full Arm processing subsystem, FPGA fabric, and complete analog/digital programmability across the RF signal chain, Zynq UltraScale+ RFSoCs provides a complete, single chip software-defined radio platform for diverse applications, and the ability to produce radio variants as market dynamics evolve.
¶ 5G and LTE Wireless
With Zynq™ RFSoC, wireless infrastructure manufacturers can achieve previously unattainable footprint and power reduction, critical to Massive MIMO deployment.
- Up to 7.125GHz input/output frequency operation on a single device
- Device variants with integrated LDPC SD-FEC cores and high DSP density for 5G baseband
- Optimal millimeter wave IF implementations including fixed wireless access and mobile backhaul
- Hardened radio digital front-end for up to 400MHz bandwidth (8T8R) for 5G New Radio (Zynq RFSoC DFE Only)
Zynq UltraScale+™ RFSoC enables cable access multi-service operators (MSOs) to move PHY layer processing closer to home with remote PHY nodes, increasing network capacity.
- RF-Analog for stringent power & form factor constraints
- LDPC to meet DOCSIS 3.1 requirements
- Extended spectrum support for DOCSIS 4.0
- FPGA logic for future-proofing and full duplex IP
As a single-chip TRX solution for scalable, multi-function, phased array radar, the Zynq UltraScale+ RFSoC enables low latency transmit and receive for optimal response time in early warning scenarios.
- Full L-Band Sampling
- Partial S-Band Direct Sampling, full S-Band at 2nd Nyquist
- Partial C-Band Direct Sampling
- Software and hardware reconfigurable
Designers can build high-speed multi-function instruments for signal generation and signal analysis by using direct RF-sampling, highly flexible, reconfigurable logic, and software programmability in Zynq UltraScale+ RFSoC.
Designers can build high-speed multi-function instruments for signal generation and signal analysis by using direct RF-sampling, highly flexible, reconfigurable logic, and software programmability in Zynq UltraScale+ RFSoC.
The Zynq™ UltraScale+™ RFSoC ZCU111 evaluation kit enables designers to jumpstart RF-Class analog designs for wireless, cable access, early-warning(EW)/radar, and other high-performance RF applications. This kit features a Zynq UltraScale+ RFSoC supporting 8 12-bit 4.096GSPS ADCs, 8 14-bit 6.554GSPS DACs, and 8 soft-decision forward error correction (SD-FECs). Complete with Arm® Cortex®-A53 and Arm Cortex-R5 subsystems, UltraScale+ programmable logic, and the highest signal processing bandwidth in a Zynq UltraScale+ device, this kit provides a rapid, comprehensive RF Analog-to-Digital signal chain prototyping platform.
- Zynq UltraScale+ RFSoC ZCU111 Evaluation Board with XCZU28DR-2FFVG1517E RFSoC
- DDR4 Component – 4GB, 64-bit, 2666MT/s, attached to Programmable Logic (PL)
- DDR4 SODIMM – 4GB 64-bit, 2400MT/s, attached to Processor Subsystem (PS)
- Ganged SFP28 cage to support up to 4 SFP/SFP+/zSFP+/SFP28 modules
- USB3, DisplayPort, and SATA
- FPGA Mezzanine Card (FMC+) interface for I/O expansion including 12 33Gb/s GTY transceivers and 34 user defined differential I/O signals
- XM500 RFMC balun transformer add-on card with 4 DACs/4 ADCs to baluns 4 DACs/4 ADCs to SMAs
The Zynq™ UltraScale+™ RFSoC ZCU208 Evaluation Kit is the ideal RF test platform for both out-of-box evaluation and cutting-edge application development. This kit features a Zynq UltraScale+ RFSoC ZU48DR, which integrates eight 14-bit 5GSPS ADCs, and eight 14-bit 10GSPS* DACs, and eight soft-decision forward error correction (SD-FEC) cores designed to jumpstart RF class applications. The combination of Arm® Cortex®-A53 and Cortex-R5 subsystems, UltraScale+ programmable logic, and the highest signal processing bandwidth in a Zynq UltraScale+ device, makes the ZCU208 evaluation kit the most comprehensive RF Analog-to-Digital signal chain prototyping platform.
Industry’s only single-chip adaptable radio platform
- Zynq UltraScale+ RFSoC XCZU48DR-2FSVG1517E silicon featured on the ZCU208 Evaluation board
- Integrated 8x 5GSPS ADC, 8x 10GSPS* DAC, 8x SD-FEC design example
- Lidless package for improved thermal dissipation
Comes equipped with all board-level features needed for design development
- DDR4 Component – 4GB, 64-bit, 2666MT/s, attached to programmable logic (PL)
- DDR4 SODIMM – 4GB 64-bit, 2400MT/s, attached to the processing subsystem (PS)
- FPGA Mezzanine Card (FMC+) interface for I/O expansion, including 12x 33Gb/s GTY transceivers and 34 user-defined differential I/O signals
- Quad zSFP/zSFP+ cage assembly
- 8 user-I/O, single-color LEDs
Includes reference design mezzanine cards to reduce development time
- CLK104 RF clock add-on card, showcasing internal reference clocking and external sampling clocking
- XM650 N79 band loopback add-on card allows simple out-of-box loopback and example reference layout for baluns
- XM655 breakout add-on card allows in-depth lab-based measurements including multi-tile synchronization (MTS)
ZRF-FMC is a Vita57.4 compliant daughter card adding FPGA gates and ADC/DAC interfaces available in Xilinx ZU48DDR RFSoC devices to Vita57.4 compliant FPGA carrier boards. This platfrom is designed and manufactures by Hightech Global company.
- Xilinx Zynq UltraScale+ RFSoC ZU48DR
- x4 ADC (14-bit) ports
- x4DAC (14-bit) ports
- x1 Vita57.4 FPGA Mezzanine Connector (FMC+ male) with 60 LVDS I/Os and 16 GTY (32.75Gbps) Serial Transceivers
- Independent DDR4 memory for the FPGA and the ARM Processors ( 8GB component for each interface)
- Configuration Flash
- x1USB/UART ports ( Processor sides)
- Programmable Clocks (with default frequencies but programmable through I2C bus)
- External Synchronous Clock port
- Dimensions: 78 mm x 69 mm
- Xilinx Zynq® UltraScale+ RFSoC XCZU29DR FPGA
- 16 ADC/DAC to the front
- 8 GB of 64-bit wide DDR4 Memory (single bank) with ECC to CPU
- 8 GB of 64-bit wide DDR4 Memory (single bank to Fabric)
- MPSoC with block RAM and UltraRAM
- SD Card
- 128 MB of boot Flash
- 64 GB of user Flash